NovaCentrix Blog

part6-lead-image-maybe

The Tarte-Py boards have arrived, they’ve been assembled, and they’ve tested. In fact, one of them is running a series of tests right now as I type this post. How did it go? In summary, it was one of the worse board bring-ups I’ve experienced in recent memory. The troubleshooting process was both frustrating and enjoyable at the same time. It was also quite time consuming, which accounts for the tardiness of this post. Fortunately, the problems were eventually solved and the boards are now working.

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Tarte-render

Today we will go over the hardware design of the MCU board, which I’ve named Tarte-Py: Tester for Automatic Resistive Trace Experiments in Python. The board follows closely in concept to the Pyboard as noted in Part 4, but with some slight circuit changes and big mechanical changes to better fit our application.

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In this article, I’ll discuss the testing approach for this project. Since I’m basically lazy, the goal is to keep things as simple as possible and try not to reinvent the wheel.

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tracer nose viewIn this article, I am going to review the variable trace resistance simulator that I’ve designed for this project. I’ll go over some design options and how I made my decision, and wrap up with the completed design, whose PCB is being produced even as I type.Ā  In case you’ve just missed the blogs leading up to this point, you can find them here.

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In the previous articles, we’ve taken a look at conductive ink PCB traces using a few back-of-the-envelope calculations. Now that we have a rough idea what to expect, it is time to get on with the fun part of this series — building a real printed circuit board and testing how it behaves as we tweak the trace resistances.

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