Production form factor is a strong determinant of the product produced and cost per unit. Currently, majority of electronics are produced in a semi-batch sheet-to-sheet (S2S) process flow. In this mode, each board is fed through individual steps in sequence. However, in such a format, the size of the board is limited, the substrate would need to be dimensionally stable and the unit costs would be high. Consider the case of building an illuminated wall. In a S2S format, the illuminated wall will need to be in smaller pieces stitched together, the wall will be built on a rigid substrate, and has been cost prohibitive because of manufacturing and instillation costs.

What if the illuminated wall could be built like old fashion wall paper?

This is the final article of the series on conductive ink experiments. Let's review the highlights of what we've learned, and summarize how we might use those lessons in a flexible circuit board design.

Transient Analysis

In this post we will examine some transient response tests as a function of trace resistance. And I've found the solution of the less-than-perfect serial port errors. This is part 7 of the series on conductive inks, and will wrap up the experiments portion of this series. The next and final post will be a summary of lessons learned.

In this post we will wrap up part 6 by looking at some DC performance tests (apologies in advance for the fact that these tests are not very photogenic). And I'll also dig a little deeper in the mystery of the serial port errors from last time.

We’ve talked about the various ways photonic soldering simplifies the soldering process, like how the PulseForge can be thought of like a grill. Here, I’m sharing an example of how photonic soldering can help engineers overcome design limitations they face when creating new devices for the 3D world around us, while traditional electronics designs have been constrained to 2D (rigid) substrates. We can overcome these limitations using photonic soldering.

The Tarte-Py boards have arrived, they've been assembled, and they've tested. In fact, one of them is running a series of tests right now as I type this post. How did it go? In summary, it was one of the worse board bring-ups I've experienced in recent memory. The troubleshooting process was both frustrating and enjoyable at the same time. It was also quite time consuming, which accounts for the tardiness of this post. Fortunately, the problems were eventually solved and the boards are now working. 

Today we will go over the hardware design of the MCU board, which I've named Tarte-Py: Tester for Automatic Resistive Trace Experiments in Python. The board follows closely in concept to the Pyboard as noted in Part 4, but with some slight circuit changes and big mechanical changes to better fit our application.

In this article, I'll discuss the testing approach for this project. Since I'm basically lazy, the goal is to keep things as simple as possible and try not to reinvent the wheel.

Testing Approach

The gist of these tests is to take various parts of the circuit of interest, say a serial data link, and first observe it while its operating in the normal way. In this project, normal means with highly conductive copper traces. In the serial data example, this would mean checking the that data is not corrupted and perhaps watching the waveform on the oscilloscope.

In this article, I am going to review the variable trace resistance simulator that I've designed for this project. I'll go over some design options and how I made my decision, and wrap up with the completed design, whose PCB is being produced even as I type.  In case you've just missed the blogs leading up to this point, you can find them here.

In the previous articles, we've taken a look at conductive ink PCB traces using a few back-of-the-envelope calculations. Now that we have a rough idea what to expect, it is time to get on with the fun part of this series -- building a real printed circuit board and testing how it behaves as we tweak the trace resistances.